Skip to main content
SearchLoginLogin or Signup

The Quad-Timepix/Timepix3 Detector: A novel solution for coming solar high energy space experiments

Presentation #124.07 in the session High-Energy Solar Investigations Through Next-Generation Remote Sensing: Spectroscopy, Imaging, and Beyond — Poster Session.

Published onOct 20, 2022
The Quad-Timepix/Timepix3 Detector: A novel solution for coming solar high energy space experiments

The TimePix3 is a cutting-edge high-energy chip developed by CERN, NIKHEF, and Bonn University that offers a superior time resolution (1.56ns with an almost zero dead time performance). It acquires time and charge information in pixels with a 55-micron pitch. The original chip design consists of a 256×256 pixel array with a 1.4cm × 1.4cm active area. We developed an updated design of the TimePix3 solution, consisting of a quad-sensor system integrated by a 2×2 Timepix ASICs and CdTe substrate array. Two Interface Boards and a (Reconfigurable Open Architecture Computing Hardware) ROACH board serve as (Field Programmable Gate Arrays) FPGAs to process data and allow the user to access the data via PC. Each Interface Board serves two ASICs and is connected to the ASIC board by 100-pin connectors. We present this assembly of detectors as a viable option for imaging spectral analysis applications in solar physics, expandable to other applications in space sciences. In particular, we present the TimePix3 quad-sensor as one of the detectors that will be part of the Focusing Optics X-ray Solar Imager (FOXSI) fourth-sounding rocket flight, funded to launch from Poker Flat in 2024 in the first-ever solar flare campaign. TimePix3 will also be part of the solar PolArization and Directivity X-Ray Experiment (PADRE) payload intended to explore the polarization and directionality of electron distributions during solar flares. We demonstrate the quad detector’s design and energy and spectral characterization, including power resolution, gain, and power consumption. We also remark on future work, including the miniaturization of the ROACH board FPGA to a flight-ready module.

No comments here